LPC1769FBD100

Product Summary

The LPC1769FBD100 is an ARM Cortex-M3 based microcontroller for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The LPC1769FBD100 operates at CPU frequencies of up to 120 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals.

Parametrics

LPC1769FBD100 absolute maximum ratings: (1)VDD(3V3) supply voltage (3.3 V) external rail: 2.4 to 3.6 V; (2)VDD(REG)(3V3) regulator supply voltage (3.3 V): 2.4 to 3.6 V; (3)VDDA analog 3.3 V pad supply voltage: -0.5 to +4.6 V; (4)Vi(VBAT) input voltage on pin VBAT for the RTC: -0.5 to +4.6 V; (5)Vi(VREFP) input voltage on pin VREFP: -0.5 to +4.6 V; (6)VIA analog input voltage on ADC related pins: -0.5 to +5.1 V; (7)VI input voltage 5 V tolerant I/O pins; only valid when the VDD(3V3) supply voltage is present: -0.5 to +5.5 V; other I/O pins: -0.5 to VDD(3V3) +0.5V; (8)IDD, supply current per supply pin: -100 mA; (9)ISS, ground current per ground pin: -100 mA.

Features

LPC1769FBD100 features: (1)ARM Cortex-M3 processor, running at frequencies of up to 100 MHz ; (2)(LPC1768/67/66/65/64/63) or of up to 120 MHz (LPC1769). A Memory Protection Unit (MPU) supporting eight regions is included; (3)ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC); (4)Up to 512 kB on-chip flash programming memory. Enhanced flash memory accelerator enables high-speed 120 MHz operation with zero wait states; (5)In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software; (6)On-chip SRAM includes: 32/16 kB of SRAM on the CPU with local code/data bus for high-performance CPU access; Two/one 16 kB SRAM blocks with separate access paths for higher throughput. These SRAM blocks may be used for Ethernet, USB, and DMA memory, as well as for general purpose CPU instruction and data storage.

Diagrams